JPH0528778Y2 - - Google Patents
Info
- Publication number
- JPH0528778Y2 JPH0528778Y2 JP1988025991U JP2599188U JPH0528778Y2 JP H0528778 Y2 JPH0528778 Y2 JP H0528778Y2 JP 1988025991 U JP1988025991 U JP 1988025991U JP 2599188 U JP2599188 U JP 2599188U JP H0528778 Y2 JPH0528778 Y2 JP H0528778Y2
- Authority
- JP
- Japan
- Prior art keywords
- support plate
- lead
- external
- thin
- external lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988025991U JPH0528778Y2 (en]) | 1988-03-01 | 1988-03-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1988025991U JPH0528778Y2 (en]) | 1988-03-01 | 1988-03-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01130554U JPH01130554U (en]) | 1989-09-05 |
JPH0528778Y2 true JPH0528778Y2 (en]) | 1993-07-23 |
Family
ID=31247208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1988025991U Expired - Lifetime JPH0528778Y2 (en]) | 1988-03-01 | 1988-03-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0528778Y2 (en]) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6121134Y2 (en]) * | 1980-09-19 | 1986-06-25 |
-
1988
- 1988-03-01 JP JP1988025991U patent/JPH0528778Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH01130554U (en]) | 1989-09-05 |
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